| 摘要 |
<P>PROBLEM TO BE SOLVED: To obtain good throughput even when accessing discontinuous addresses in a data memory and reading/writing element data. <P>SOLUTION: A memory control device comprises: a first generation part generating an address for each bank for reading/writing an element data string in a memory which has multiple banks from/to which the element data string is read/written; a second generation part generating a signal which associates the location of arithmetic element data in the element data string with storage order in a vector register; and a selector part selecting the arithmetic element data from the element data string read into the multiple banks and storing it in the vector register, or inserting the arithmetic element data read from the vector register in the element data string. By this way, latency is suppressed and good throughput of a vector processor is obtained. <P>COPYRIGHT: (C)2012,JPO&INPIT |
