| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a TFT capable of decreasing parasitic capacitance and inhibiting decrease in response speed. <P>SOLUTION: A TFT 100 comprises an organic semiconductor layer 150 provided on a substrate 110, a source electrode 120 and a drain electrode 130 both contacting the organic semiconductor layer 150 and facing each other to form a channel region, a gate electrode 140 provided via the organic semiconductor layer 150 and an insulation layer 160, a source electrode wiring part 125 conductively connected with the source electrode 120, a drain electrode wiring part 135 conductively connected with the drain electrode 130, and a gate electrode wiring part 145 conductively connected with the gate electrode 140. When viewed from a lamination direction, the organic semiconductor layer 150 includes the gate electrode 140, the gate electrode 140 includes a region including the source electrode 120, the drain electrode 130 and the channel region, and the gate electrode wiring part 145 is provided between the source electrode wiring part 125 and the drain electrode wiring part 135 on a circumference of the organic semiconductor layer 150. <P>COPYRIGHT: (C)2012,JPO&INPIT |
