| 摘要 |
Embodiments of the present invention are directed to providing an increased trace width when traversing a void in another layer in a printed circuit board or package design. By increasing the trace width or alternatively increasing the capacitance, the degradation due to the void can be reduced. This approach works for microstrip, stripline as well as other transmission lines that use a reference plane. The void can be the result of an antipad associated with a via, or any other disruption in an otherwise uniform reference plane.
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