发明名称 BUMPED SEMICONDUCTOR WAFER OR DIE LEVEL ELECTRICAL INTERCONNECT
摘要 A probe assembly that acts as a temporary interconnect between terminals on an IC device and a test station. The probe assembly includes a plurality of stud bumps arranged on a first surface of a substrate in a configuration corresponding to the terminal on the IC device. The stud bumps include a shape adapted to temporarily couple with the terminals on the IC device. A plurality of conductive traces on the substrate electrically couple the stud bumps with the test station.
申请公布号 US2012182035(A1) 申请公布日期 2012.07.19
申请号 US201213413032 申请日期 2012.03.06
申请人 RATHBURN JAMES;HSIO TECHNOLOGIES, LLC 发明人 RATHBURN JAMES
分类号 G01R31/20 主分类号 G01R31/20
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