发明名称 Method and apparatus for saving power by efficiently disabling ways for a set-associative cache
摘要 A method and apparatus for disabling ways of a cache memory in response to history based usage patterns is herein described. Way predicting logic is to track consecutive misses to ways of a cache, i.e. hits/reads to other ways of cache. Based on the usage of ways and the non-usage of other ways, the way predicting logic determines if a way is to be powered down. In response to determining a way is to be powered down, the way predicting logic generates a power signal to power down an associated. Furthermore, upon a subsequent hit to a powered down way, the way predicting logic toggles the power signal to power up the associated way to ensure performance.
申请公布号 US8225046(B2) 申请公布日期 2012.07.17
申请号 US20060541174 申请日期 2006.09.29
申请人 LICHT MARTIN;COMBS JONATHAN;HUANG ANDREW;INTEL CORPORATION 发明人 LICHT MARTIN;COMBS JONATHAN;HUANG ANDREW
分类号 G06F12/00;G06F1/26;G06F1/32;G06F13/00;G06F13/28 主分类号 G06F12/00
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