发明名称 Packaged electronic devices having die attach regions with selective thin dielectric layer
摘要 A packaged electronic device including a package substrate having a top substrate surface including a die attach region including at least one land pad thereon and a first dielectric layer positioned lateral to the land pad and a non-die attach region. The non-die attach region includes a second dielectric layer, wherein a thickness of the second dielectric layer is>a thickness of the first dielectric layer by at least 5μm. An IC die has a top semiconductor surface including active circuitry and at least one bonding conductor formed on the top semiconductor surface, and a bottom surface, wherein the bonding conductor of the IC die is joined to the land pad of the package substrate. An underfill layer is between the IC die and the die attach region.
申请公布号 US8222748(B2) 申请公布日期 2012.07.17
申请号 US20090563206 申请日期 2009.09.21
申请人 GALLEGOS BERNARDO;MASUMOTO KENJI;TEXAS INSTRUMENTS INCORPORATED 发明人 GALLEGOS BERNARDO;MASUMOTO KENJI
分类号 H01L23/48;H01L23/52;H01L29/40 主分类号 H01L23/48
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