发明名称 VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE
摘要 Each of basic array planes has a first via group that interconnects only even-layer bit lines in the basic array plane, and a second via group that interconnects only odd-layer bit lines in the basic array plane, the first via group in a first basic array plane and the second via group in a second basic array plane adjacent to the first basic array in a Y direction are adjacent to each other in the Y direction, and the second via group in the first basic array plane and the first via group in the second basic array plane are adjacent to each other in the Y direction, and the second via group in the second basic array plane is disconnected from a second global line when connecting the first via group in the first basic array plane to a first global line.
申请公布号 US2012176834(A1) 申请公布日期 2012.07.12
申请号 US201113496895 申请日期 2011.08.10
申请人 IKEDA YUICHIRO;SHIMAKAWA KAZUHIKO;AZUMA RYOTARO 发明人 IKEDA YUICHIRO;SHIMAKAWA KAZUHIKO;AZUMA RYOTARO
分类号 G11C11/21 主分类号 G11C11/21
代理机构 代理人
主权项
地址
您可能感兴趣的专利