| 摘要 |
<P>PROBLEM TO BE SOLVED: To improve read-out accuracy of data. <P>SOLUTION: A resistance change type memory of an embodiment comprises: a plurality of memory cells MC_s and MC_us connected between a bit line BL and a source line SL while respectively including resistance change type memory elements 3 and cell transistors 2 having a gate to be connected to word lines WL; an n-channel type field-effect transistor 5N having a first gate to be applied by a control voltage CLMPn and a current path to be connected to the bit line BL; and a p-channel type field-effect transistor 5P having a second gate to be applied by a control voltage CLMPp and a current path to be connected to the source line SL. When data are read out, a bit line potential VBL is larger than a source line potential VSL, and a word line potential VWL_s of a selection cell MC_s is larger than the bit line potential VBL, and a word line potential VWL_us of a non-selection cell MC_us is smaller than the source line potential VSL. <P>COPYRIGHT: (C)2012,JPO&INPIT |
