发明名称 SEMICONDUCTOR DEVICE MANUFACTURING METHOD
摘要 <P>PROBLEM TO BE SOLVED: To prevent a short circuit between elements arranged adjacent to each other across an element isolation region by embedding a microfabricated trench used for the element isolation region with an insulation film without generating voids thereby to inhibit deterioration in manufacturing yield. <P>SOLUTION: A semiconductor device manufacturing method comprises: forming a first insulation film having voids inside in a trench formed in a semiconductor substrate; subsequently removing, by etching, the first insulation film so as to leave a part of the first insulation film in the trench with the voids being exposed; subsequently depositing a second insulation film in the voids and on an exposed inner wall of the trench by an ALD method; and subsequently performing one or more cycles of an HDP-CVD method including an etching step and a deposition step thereby to form an element isolation region. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012134288(A) 申请公布日期 2012.07.12
申请号 JP20100284455 申请日期 2010.12.21
申请人 ELPIDA MEMORY INC 发明人 NISHITANI JUNICHIRO
分类号 H01L21/76 主分类号 H01L21/76
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