DELTA-SIGMA MODULATING FRACTIONAL-N PLL FREQUENCY SYNTHESIZER AND WIRELESS COMMUNICATION DEVICE EQUIPPED WITH SAME

摘要

A delta-sigma modulating fractional-n PLL frequency synthesizer for performing fractionalization by modulating a divider (25), the synthesizer comprising: an arithmetic processing means (27) for obtaining a shift amount (S) that is to be added to a fractional-part data (K), and outputting the shift amount (S) and a shifted fractional-part data (K2); a first delta-sigma modulator (28) for integrating and quantizing the shifted fractional-part data (K2); a second delta-sigma modulator (29) for integrating and quantizing the shift amount (S); a first adder (30) for adding the output series from the first delta-sigma modulator (28) and the sign-inversion output from the second delta-sigma modulator (29); and a second adder (31) for adding an integral-part data (M) and the output from the first adder (30). The divider (25) is modulated by the output from the second adder (31).