发明名称
摘要 A parallel decoder for decoding a code division multiplexed (CDM) signal. The parallel decoder has two matched filters, both operating at a frequency equal to half the chip rate of the CDM signal. One matched filter correlates odd-numbered chips of the CDM signal with odd-numbered chips of the spreading code. The other matched filter correlates even-numbered chips of the CDM signal with even-numbered chips of the spreading code. The two resulting correlated signals are combined, and the decoded signal is obtained from the combined signal. This arrangement doubles the maximum possible chip rate of the CDM signal.
申请公布号 JP4973402(B2) 申请公布日期 2012.07.11
申请号 JP20070232471 申请日期 2007.09.07
申请人 发明人
分类号 H04B1/7093;H04B1/707;H04B1/708;H04B10/27;H04B10/272 主分类号 H04B1/7093
代理机构 代理人
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