发明名称
摘要 There is a room for improvement in conventional semiconductor devices in terms of reducing the chip area. A semiconductor device 1 comprises an evaluation transistor 10 (first characteristic evaluation device), an evaluation transistor (second characteristic evaluation device), measurement pads 30 (first measurement pads) and measurement pads 40 (second measurement pads). The measurement pad 30 and the measurement pad 40 are provided in different layers in the interconnect layer.
申请公布号 JP4970787(B2) 申请公布日期 2012.07.11
申请号 JP20050359895 申请日期 2005.12.14
申请人 发明人
分类号 H01L21/66;H01L21/3205;H01L21/336;H01L21/768;H01L21/822;H01L23/522;H01L27/04;H01L29/78 主分类号 H01L21/66
代理机构 代理人
主权项
地址