| 摘要 |
The integrity of a control network for providing reliable communications between different entities is verified. Such a verified control network may be included in a device, system, or design library. The verification of a control network includes, but is not limited to: physically exercising the control network itself and/or its design via modeling, analysis, and/or applying or using other testing or design verification methodologies. For example, a Petri net model of the control network may be analyzed to verify that the control signals cannot be generated which could interfere with each other, that a deadlock condition cannot be reached, and that a control signal on an input port will result in a control signal on an output port, albeit possibly delayed. |
