发明名称 Apparatus and muting circuit
摘要 An apparatus and a muting circuit. The apparatus comprises an amplifier, a mute circuit, a pull-down circuit, and a power detection circuit. The amplifier receives a power supply voltage and a common mode voltage, and amplifies an audio input signal to generate an audio output signal. The mute circuit, coupled to the amplifier, conducts the audio output signal to about ground level upon receiving a mute signal. The pull-down circuit, coupled to the amplifier, pulls the common mode voltage to about ground level upon receiving a pull-down signal. The power detection circuit, coupled to the mute circuit and the pull-down circuit, detects power-up or power-down of the power supply voltage, and generates the mute signal and a pull-down signal according to the power-up or power-down operation.
申请公布号 US8218793(B2) 申请公布日期 2012.07.10
申请号 US20070949796 申请日期 2007.12.04
申请人 TSAI JEN-CHE;WONG YAU-WAI;MEDIATEK INC. 发明人 TSAI JEN-CHE;WONG YAU-WAI
分类号 H03F99/00;H04R3/00 主分类号 H03F99/00
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