发明名称 COLUMN ADDRESS CIRCUIT IN SEMICONDUCTOR MEMORY DEVICE AND COLUMN ADDRESS GERNERATION METHOD
摘要 PURPOSE: A column address circuit of a semiconductor memory device and a method for generating a column address are provided to secure the margin of a counting operation of a column address circuit by generating the column address with a preset number. CONSTITUTION: A column address generating circuit(110) generates a dummy inner clock in response to a data output enable signal and generates an inner clock in response to a read enable signal. The column address generating circuit generates initial counting addresses according to the dummy inner clock and generates normal counting addresses after the initial counting address according to the inner clock. A column address output circuit(120) successively stores the initial counting address and the normal addresses and successively outputs the initial counting address and the normal addresses as the column addresses in response to a synchronization clock.
申请公布号 KR20120077281(A) 申请公布日期 2012.07.10
申请号 KR20100139181 申请日期 2010.12.30
申请人 SK HYNIX INC. 发明人 KIM, MIN SU;PARK, JIN SU
分类号 G11C16/08;G11C16/32 主分类号 G11C16/08
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