| 摘要 |
An integrated circuit device includes a bottom wafer having a first annular dielectric block, at least one stacking wafer having a second annular dielectric block positioned on the bottom wafer, and a conductive via penetrating through the stacking wafer and into the bottom wafer in a substantially linear manner. In one embodiment of the present invention, the bottom wafer and the stacking wafer are bonded by an intervening adhesive layer, no bump pad is positioned between the bottom wafer and the stacking wafer, and the conductive via is positioned within the first annular dielectric block and the second annular dielectric block.
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