发明名称 SEMICONDUCTOR DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To achieve a reduction in cost price of a standard cell by devising the arrangement of two input terminals to ensure an additional space for a wiring layer. <P>SOLUTION: An input terminal 34b is connected to gate wiring 2b, and an input terminal 34c is connected to gate wiring 2c. The input terminals 34b and 34c are disposed adjacent to each other in the Y direction, and second contact wiring 4b of the input terminal 34b is adjacent to first contact wiring 3b and extends in the X direction with respect to the first contact wiring 3b. Second contact wiring 4c of the input terminal 34c is adjacent to first contact wiring 3c and extends in the opposite direction of the extending direction of the second contact wiring 4b in the X direction with respect to the first contact wiring 3c. More specifically, the first contact wiring 3b of the input terminal 34b and the second contact wiring 4c of the input terminal 34c are disposed so as to face each other in the Y direction, and the second contact wiring 4b of the input terminal 34b and the first contact wiring 3c of the input terminal 34c are disposed so as to face each other in the Y direction. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012129435(A) 申请公布日期 2012.07.05
申请号 JP20100281255 申请日期 2010.12.17
申请人 SANYO ELECTRIC CO LTD;SANYO SEMICONDUCTOR CO LTD 发明人 FUJINO TSUTOMU
分类号 H01L21/82;H01L21/3205;H01L21/768;H01L23/522 主分类号 H01L21/82
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