发明名称 Memory Device Having DRAM Cache and System Including the Memory Device
摘要 The present disclosure relates to a memory device and a system including the memory device. The memory device may include a non-volatile memory, a dynamic random access memory (DRAM) cache, a DRAM, and a control circuit. The control circuit may perform interfacing between the DRAM and a host, between the DRAM cache and the host, and between the non-volatile memory and the DRAM cache. The memory device may have a high operating speed and may be incorporated in a simple package, such as a multi-chip package.
申请公布号 US2012173809(A1) 申请公布日期 2012.07.05
申请号 US201213344150 申请日期 2012.01.05
申请人 KO TAE-KYEONG 发明人 KO TAE-KYEONG
分类号 G06F12/00 主分类号 G06F12/00
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