| 摘要 |
A mixed-signal integrator, having an analog input and a digital output, is adapted to perform an integration operation partially in the analog domain and partially in the digital domain while eliminating the limitations of a conventional analog integrator. The integrator also digitizes a signal of interest without the use of a conventional sampling operation followed by a conventional analog-to-digital converter. The analog integrator portion generates an analog integration signal limited between low and high rail voltages defined by two comparators with corresponding threshold voltages. When either rail voltage is reached, the polarity of the input signal is reversed to prevent the integration result from exceeding that rail. Each such event is also tracked in digital logic, which provides a count whenever two consecutive such events correspond to the two different rails. At the end of the integration duration this count serves as the digital representation of the integration result. |
