发明名称 CIRCUIT DESIGN METHOD, PROGRAM AND SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To efficiently design a circuit for a short period of time. <P>SOLUTION: In the circuit design method, selection sections 6 and 11 are provided in each hierarchy (in the example of FIG. 1, top hierarchy and lower hierarchy) of hierarchy design data which serially connect test circuit models 4, 5, 9 and 10 included in circuit blocks in each of the hierarchies in the hierarchies and between the hierarchies, selects and outputs any one of test data (test result) through the test circuit models 4, 5, 9 and 10 of its own hierarchy and test data not through the test circuit models 4, 5, 9 and 10 of its own hierarchy. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012128819(A) 申请公布日期 2012.07.05
申请号 JP20100282349 申请日期 2010.12.17
申请人 FUJITSU SEMICONDUCTOR LTD 发明人 TSUKUDA DAISUKE
分类号 G06F17/50;G01R31/28 主分类号 G06F17/50
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