发明名称 Structure and assembly procedure for low stress thin die flip chip packages designed for low-K Si and thin core substrate
摘要 Provided are semiconductor die flip chip packages and semiconductor die flip chip package components where certain properties of the packages/components are controlled to facilitate management of the package stresses. Also provided are fabrication methods for such packages and package components. For instance, the thickness of a die can be controlled such that the stress generated/experienced by the die is minimized. As such, the package stress is managed to suitable levels for incorporation of a low-K Si die and/or a thin package substrate. Further, a thin die can be attached to a heat spreader to increase the rigidity for easier handling during fabrication of the semiconductor die flip chip package.
申请公布号 US8212353(B1) 申请公布日期 2012.07.03
申请号 US20100778905 申请日期 2010.05.12
申请人 WANG WEN-CHOU VINCENT;LI YUAN;EUZENT BRUCE;MAHADEV VADALI;ALTERA CORPORATION 发明人 WANG WEN-CHOU VINCENT;LI YUAN;EUZENT BRUCE;MAHADEV VADALI
分类号 H01L23/34 主分类号 H01L23/34
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