发明名称 COMMUNICATIONS ARCHITECTURE FOR PROVIDING DATA COMMUNICATION, SYNCHRONIZATION AND FAULT DETECTION BETWEEN ISOLATED MODULES
摘要 An electronic system includes a master module having a first control unit having one or more first serial interfaces and being programmed to output a first data signal and a first clock signal through the one or more first serial interfaces, and a slave module having a second control unit, the second control unit having a second serial interface. The slave module receives the first clock signal through the second serial interface, and the second control unit is programmed to monitor the slave module for a fault condition and output a second clock signal through the second serial interface which is (i) the same as the first clock signal if a fault condition on the slave module is not detected, and (ii) a modified clock signal having a predetermined format through the second serial interface if a fault condition on the slave module is detected.
申请公布号 US2012166695(A1) 申请公布日期 2012.06.28
申请号 US201113329789 申请日期 2011.12.19
申请人 VENUS BRIAN;BENAVIDES NICHOLAS D.;CONVERTEAM TECHNOLOGY LTD. 发明人 VENUS BRIAN;BENAVIDES NICHOLAS D.
分类号 G06F13/00 主分类号 G06F13/00
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