METHOD AND APPARATUS FOR GENERATING A SYSTEM CLOCK SIGNAL
摘要
<p>An apparatus includes a processor, a clock recovery circuit and a frequency locked loop. The processor receives a system clock signal to clock operations of the processor; and the clock recovery circuit recovers a clock signal from data communication occurring over a bus. The frequency locked loop receives the clock signal from the clock recovery circuit as a reference clock signal, and the frequency locked loop is adapted to lock onto the clock signal provided by the clock recovery circuit to provide the system clock signal.</p>
申请公布号
WO2012088275(A1)
申请公布日期
2012.06.28
申请号
WO2011US66498
申请日期
2011.12.21
申请人
SILICON LABORATORIES INC.;FERNALD, KENNETH, W.;THOMAS, DAVID, S.;WESTWICK, ALAN, L.
发明人
FERNALD, KENNETH, W.;THOMAS, DAVID, S.;WESTWICK, ALAN, L.