发明名称 MEMORY SYSTEM AND CONTROL METHOD THEREOF
摘要 The embodiments include an error correction processing unit and an error correction history recording unit. The error correction processing unit performs an error correction process based on data read from a non-volatile semiconductor memory and a second-step error correction code corresponding to the data. The error correction history recording unit records error correction history indicating whether first error correction is successful through the first error correction process, in association with unit data. When error correction history of target unit data to be read indicates that correction is not successful, the second error correction process is executed without executing the first error correction process.
申请公布号 US2012166906(A1) 申请公布日期 2012.06.28
申请号 US201113238685 申请日期 2011.09.21
申请人 NAGADOMI YASUSHI;TAKASHIMA DAISABURO;KABUSHIKI KAISHA TOSHIBA 发明人 NAGADOMI YASUSHI;TAKASHIMA DAISABURO
分类号 H03M13/29;G06F11/10 主分类号 H03M13/29
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