| 摘要 |
A memory controller, and/or operation thereof, to generate a single interrupt for a plurality of data blocks which are the subject of a data transfer request. In an embodiment, a set of flags is allocated for the data transfer request, each flag corresponding to a respective one of the plurality of data blocks. In another embodiment, a single hardware interrupt is generated for all data which is the subject of the data transfer request, the generating based on an evaluation of the allocated set of flags.
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