发明名称 Decoder for Nand Memory
摘要 An integrated circuit device has multiple blocks of NAND memory cells, and a high voltage switch. The high voltage switch is coupled to a decoder output and the blocks of NAND memory cells. The high voltage switch has an output voltage range with positive and negative voltages.
申请公布号 US2012163087(A1) 申请公布日期 2012.06.28
申请号 US201113185887 申请日期 2011.07.19
申请人 HUNG SHUO-NAN;CHEN CHANG TING;HUNG CHI-YU;LIU TSENG-YI;MACRONIX INTERNATIONAL CO., LTD. 发明人 HUNG SHUO-NAN;CHEN CHANG TING;HUNG CHI-YU;LIU TSENG-YI
分类号 G11C16/08 主分类号 G11C16/08
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