| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device that can be microfabricated while ensuring a refresh time margin sufficiently. <P>SOLUTION: A memory cell is configured by a readout transistor, a write-in transistor, and a capacitor. In such a configuration, the capacitor controls a potential to be applied to a gate of the readout transistor. The write-in transistor controls the writing and eliminating of data, and is configured by a transistor with a small off-time current so that electric charge stored in the capacitor is not lost by a leakage current of the write-in transistor. A semiconductor layer constituting the write-in transistor is provided so as to bridge between a gate electrode and a source region of the readout transistor. The capacitor is provided so as to be overlapped with the gate electrode of the readout transistor. <P>COPYRIGHT: (C)2012,JPO&INPIT |
