| 摘要 |
<P>PROBLEM TO BE SOLVED: To suppress spurious emissions without setting a low cutoff frequency of a loop filter. <P>SOLUTION: In a fractionally frequency dividing PLL circuit 1 having a first frequency divider 103 for dividing a reference frequency generated by a reference oscillator into a predetermined reference clock, a second frequency divider 105 for fractionally dividing an oscillation frequency generated by a voltage-controlled oscillator into a predetermined feedback clock, a phase comparator 106 for comparing the phases of the reference clock and feedback clock, and a charge pump 107 for controlling the oscillation frequency of the voltage-controlled oscillator according to the result of comparison in the phase comparator 106, a power pad 1-2 for the first frequency divider 103, a power pad 1-1 for the second frequency divider 105, a power pad 1-3 for the phase comparator 106 and a power pad 1-4 for the charge pump 107 are disposed separately. <P>COPYRIGHT: (C)2012,JPO&INPIT |
