发明名称 LAMINATE CHIP PACKAGE MANUFACTURING METHOD
摘要 <P>PROBLEM TO BE SOLVED: To mass produce laminate chip packages, on the side face of a main body including plural laminated semiconductor chips of which wiring is arranged, at low costs and in a short time. <P>SOLUTION: A laminate chip package comprises a main body including plural layer portions, and wiring including plural wires arranged on a side surface of the main body. A laminate chip package manufacturing method includes a step for producing a laminate substructure 120, and a step for cutting the laminate substructure 120. The laminate substructure 120 includes a plurality of aligned pre-separation bodies 2P, a plurality of housing parts 133 arranged between the two adjacent pre-separation bodies 2P, and a plurality of preliminary wires 143 housed in the plural housing parts 133. The plural housing parts 133 is formed on a photosensitive resin layer by photolithography. In the step for cutting the laminate substructure 120, the plural pre-separation bodies 2P are separated from each other, and the wire is formed by the preliminary wire 143. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012124455(A) 申请公布日期 2012.06.28
申请号 JP20110149245 申请日期 2011.07.05
申请人 HEADWAY TECHNOLOGIES INC;SAE MAGNETICS(H K )LTD 发明人 SASAKI YOSHITAKA;ITO HIROYUKI;IKEJIMA HIROSHI;IIJIMA ATSUSHI
分类号 H01L25/065;H01L23/52;H01L25/07;H01L25/18 主分类号 H01L25/065
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