| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a Through Silicon Via (TSV) interconnection structure reducing a bad influence on characteristics of an adjacent device. <P>SOLUTION: A substrate having a first principal surface S1 is provided, and at least one TSV hole part and a trench-like structure 3 surrounding the TSV hole part and separated by the rest of a substrate material are simultaneously made by etching. Dielectric liners 2a and 2b are accumulated to pinch off an opening of the trench-like structure by the first principal surface of the substrate and smooth a side wall of the TSV hole part, and an air gap 4 is made in the trench-like structure. A conductor material is accumulated in the TSV hole part so as to generate TSV interconnection 10. <P>COPYRIGHT: (C)2012,JPO&INPIT |
