| 摘要 |
Although the IC within a power supply 10 for an OLED display 30 may be disabled to prevent generation of VDD_OLED during a display sleep mode, and the switch NMT3 in series with the OLED may be disabled to prevent leakage through the OLED, leakage current may flow from VBAT through the supply circuit 10, the display circuit 30 and the driver 40 to Earth (figure 2) when the transistors in circuit 30 are enabled by the SCAN and EM signals, which may remain active in sleep mode. A series supply switch 20 is provided to prevent this leakage current. The power supply voltage Vs, and thus the reference voltage VREF, may be controlled to be the same as VDD_OLED when in sleep mode, further reducing leakage. A resistor Rpd may be provided to ensure that NMOS pull-down device NMT2 is off. |
