| 摘要 |
PURPOSE: A method for manufacturing a semiconductor device is provided to stably form a plug by suppressing a loss of an interlayer dielectric layer. CONSTITUTION: A peripheral circuit transistor with a gate is formed. A planarized interlayer dielectric layer(40) is formed in a structure with a cell transistor and a peripheral circuit transistor. A capping insulation layer(41) with a relatively low etching rate is formed on the interlayer dielectric layer. A contact hole is formed by selectively etching the interlayer dielectric layer and the capping insulation layer to expose a junction area of the cell transistor.
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