| 摘要 |
A microelectronic package (290) having a (substrate 230), a microelectronic element (170), e.g., a chip, and terminals (240) can have conductive elements (238) electrically connected with element contacts of the chip and contacts of the substrate. Conductive elements can be electrically insulated from one another for simultaneously carrying different electric potentials. An encapsulant (201) can overlie the first surface (136) of the substrate and at least a portion of a face (672) of the microelectronic element remote from the substrate, and may have a major surface (200) above the microelectronic element. A plurality of package contacts (120, 220, 408, 410, 427) can overlie a face (672) of the microelectronic element remote from the substrate. The package contacts, e.g., conductive masses (410), substantially rigid posts (120, 220), can be electrically interconnected with terminals (240) of the substrate (230), such as through the conductive elements. The package contacts can have top surfaces (121) at least partially exposed at the major (surface 200) of the encapsulant (201). |
