发明名称 SEMICONDUCTOR CHIP, SEMICONDUCTOR DEVICE AND LSI DESIGN DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To achieve reduction of chip cost and enhancement of the yield of chips simultaneously. <P>SOLUTION: The semiconductor chip is provided with a first layout L1 having a pad region 11 and a non-square gate region 12, and a second layout L2 obtained by rotating the first layout L1 by 180&deg;. The first and second layouts L1, L2 configure a chip layout when they are combined point symmetrically without overlapping. The chip layout is arranged in a square chip region, and the first and second layouts L1, L2 configure LSIs operating independently. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012119562(A) 申请公布日期 2012.06.21
申请号 JP20100269187 申请日期 2010.12.02
申请人 TOSHIBA CORP;TOSHIBA INFORMATION SYSTEMS (JAPAN) CORP 发明人 NINNA YASUYUKI
分类号 H01L27/04;H01L21/82;H01L21/822 主分类号 H01L27/04
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