发明名称 MULTILAYER WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME
摘要 To provide a multilayer wiring substrate in which the connection reliability of via conductors is enhanced, via holes are formed in a resin interlayer insulation layer which isolates a lower conductor layer from an upper conductor layer, and via conductors are formed in the via holes for connecting the lower conductor layer and the upper conductor layer. The surface of the resin interlayer insulation layer is a rough surface, and the via holes open at the rough surface of the resin interlayer insulation layer. Stepped portions are formed in opening verge regions around the via holes such that the stepped portions are recessed from peripheral regions around the opening verge regions. The stepped portions are higher in surface roughness than the peripheral regions.
申请公布号 US2012153463(A1) 申请公布日期 2012.06.21
申请号 US201113324535 申请日期 2011.12.13
申请人 MAEDA SHINNOSUKE;NGK SPARK PLUG CO., LTD. 发明人 MAEDA SHINNOSUKE
分类号 H01L23/498;H05K1/00;H05K1/11;H05K3/10 主分类号 H01L23/498
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