发明名称 MEMORY SYSTEM
摘要 <P>PROBLEM TO BE SOLVED: To provide a memory system capable of reading data out fast. <P>SOLUTION: The memory system includes: a plurality of banks each having a memory cell array and a sense amplifier; a buffer circuit electrically connected to the banks through a data bus; a switch circuit which changes electric connections between the plurality of bank and the buffer circuit, an interface electrically connected to the buffer circuit; and a control part which controls the banks, buffer circuit, switch circuit, and interface. When data held in the memory cell array is output to the interface with five clocks, the control part controls the switch circuit to electrically connect the banks and the buffer circuit after the clocks are input to the banks and 1.5 clocks elapses, and outputs the data read out of the banks to a burst buffer. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012119033(A) 申请公布日期 2012.06.21
申请号 JP20100267828 申请日期 2010.11.30
申请人 TOSHIBA CORP 发明人 KASHIWAGI HITOSHI;FUJITA SHIRO;WATANABE TOSHIFUMI
分类号 G11C11/413 主分类号 G11C11/413
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