发明名称 METHOD AND APPARATUS FOR OPTIMIZING THE USAGE OF CACHE MEMORIES
摘要 A method and apparatus to reduce unnecessary write backs of cached data to a main memory and to optimize the usage of a cache memory tag directory. In one embodiment of the invention, the power consumption of a processor can be saved by eliminating write backs of cache memory lines that has information that has reached its end-of-life. In one embodiment of the invention, when a processing unit is required to clear one or more cache memory lines, it uses a write-zero command to clear the one or more cache memory lines. The processing unit does not perform a write operation to move or pass data values of zero to the one or more cache memory lines. By doing so, it reduces the power consumption of the processing unit.
申请公布号 US2012159077(A1) 申请公布日期 2012.06.21
申请号 US20100974907 申请日期 2010.12.21
申请人 STEELY, JR. SIMON C.;EMER JOEL S.;HASENPLAUGH WILLIAM C. 发明人 STEELY, JR. SIMON C.;EMER JOEL S.;HASENPLAUGH WILLIAM C.
分类号 G06F12/08 主分类号 G06F12/08
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