| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a technology to reduce electric power consumed in distributing a clock signal over an integrated circuit. <P>SOLUTION: An integrated circuit 2 comprises functional circuits 4, 6 arranged to operate in response to an operational clock signal having an operational clock frequency. To save power, the clock signal is distributed across the integrated circuit 2 at a distribution clock frequency lower than the operational clock frequency. A clock converter 10 is provided to convert the distribution clock signal into the operational clock signal for controlling operation of the functional circuits 4, 6. <P>COPYRIGHT: (C)2012,JPO&INPIT |
