发明名称 INTEGRATION OF SHALLOW TRENCH ISOLATION AND THROUGH-SUBSTRATE VIAS INTO INTEGRATED CIRCUIT DESIGNS
摘要 A method of manufacturing an IC, comprising providing a substrate having a first side and a second opposite side, forming a STI opening in the first side of the substrate and forming a partial TSV opening in the first side of the substrate and extending the partial TSV opening. The extended partial TSV opening is deeper into the substrate than the STI opening. The method also comprises filling the STI opening with a first solid material and filling the extended partial TSV opening with a second solid material. Neither the STI opening, the partial TSV opening, nor the extended partial TSV opening penetrate an outer surface of the second side of the substrate. At least either: the STI opening and the partial TSV opening are formed simultaneously, or, the STI opening and the extended partial TSV opening are filled simultaneously.
申请公布号 US2012153430(A1) 申请公布日期 2012.06.21
申请号 US20100969852 申请日期 2010.12.16
申请人 BACHMAN MARK A.;MERCHANT SAILESH M.;OSENBACH JOHN;LSI CORPORATION 发明人 BACHMAN MARK A.;MERCHANT SAILESH M.;OSENBACH JOHN
分类号 H01L23/52;H01L21/44;H01L21/76 主分类号 H01L23/52
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