发明名称 STACK PACKAGE AND METHOD FOR SELECTING CHIP IN STACK PACKAGE
摘要 A stack package having stacked chips includes first voltage dropping units respectively formed in the chips; second voltage dropping units respectively formed in the chips; first signal generation units connected in parallel to a first line formed by connecting the first voltage dropping units in series, respectively formed in the chips, and configured to apply high level signals according to a voltage of the first line; second signal generation units connected in parallel to a second line formed by connecting in series the second voltage dropping units, respectively formed in the chips, and configured to apply high level signals according to a voltage of the second line; and chip selection signal generation units respectively formed in the chips, and configured to combine signals outputted from the first signal generation units and the second signal generation units and generate chip selection signals.
申请公布号 US2012154020(A1) 申请公布日期 2012.06.21
申请号 US201113330970 申请日期 2011.12.20
申请人 LEE DAE WOONG;HWANG YU GYEONG;SON JAE HYUN;KANG TAE MIN;YOON CHUL KEUN;LEE BYOUNG DO;KIM YU HWAN;HYNIX SEMICONDUCTOR INC. 发明人 LEE DAE WOONG;HWANG YU GYEONG;SON JAE HYUN;KANG TAE MIN;YOON CHUL KEUN;LEE BYOUNG DO;KIM YU HWAN
分类号 G11C5/14 主分类号 G11C5/14
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