| 摘要 |
Techniques are disclosed relating to testing logic in integrated circuits using an external test tool. In one embodiment, an integrated circuit includes a logic unit and a self-test unit. The self-test unit is configured to receive an expected signature value that corresponds to an expected output value of the logic unit, and to compare the expected signature value and an actual signature value generated from an actual output value from the logic unit. In some embodiments, the integrated circuit further includes a pseudo-random pattern generator configured to provide an input value to the logic unit, and the logic unit is configured to generate the actual output value based on the provided input value. In some embodiments, the integrated circuit further includes a multiple-input signature register (MISR) configured to generate the actual signature value based on the actual output value and a seed value.
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