发明名称 MEMORY MODEL FOR HARDWARE ATTRIBUTES WITHIN A TRANSACTIONAL MEMORY SYSTEM
摘要 A method and apparatus for providing a memory model for hardware attributes to support transactional execution is herein described. Upon encountering a load of a hardware attribute, such as a test monitor operation to load a read monitor, write monitor, or buffering attribute, a fault is issued in response to a loss field indicating the hardware attribute has been lost. Furthermore, dependency actions, such as blocking and forwarding, are provided for the attribute access operations based on address dependency and access type dependency. As a result, different scenarios for attribute loss and testing thereof are allowed and restricted in a memory model.
申请公布号 US2012159079(A1) 申请公布日期 2012.06.21
申请号 US201213359238 申请日期 2012.01.26
申请人 发明人 SHEAFFER GAD;RAIKIN SHLOMO;BASSIN VADIM;COHEN EHUD;MARGULIS OLEG
分类号 G06F12/08 主分类号 G06F12/08
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