发明名称 Enhanced control in scan tests of integrated circuits with partitioned scan chains
摘要 A test controller implemented in an integrated circuit (IC) with partitioned scan chains provides enhanced control in performing scan tests. According to an aspect, a test controller can selectively control scan-in, scan-out and capture phases of scan tests for different scan chains of the IC to be independent. The number of pins required to interface the test controller with an external tester is less than the number of partitions that the test controller can support. According to another aspect, an IC includes a register corresponding to each partition to support transition fault (or LOS) testing. According to another aspect, an IC with partitioned scan chains includes serial to parallel and parallel to serial converters, thereby minimizing the external pins required to support scan tests.
申请公布号 US8205125(B2) 申请公布日期 2012.06.19
申请号 US20090604397 申请日期 2009.10.23
申请人 HALES ALAN DAVID;NAKIDI SRUJAN KUMAR;PAREKHJI RUBIN AJIT;RAVI SRIVATHS;TIWARI RAJESH KUMAR;TEXAS INSTRUMENTS INCORPORATED 发明人 HALES ALAN DAVID;NAKIDI SRUJAN KUMAR;PAREKHJI RUBIN AJIT;RAVI SRIVATHS;TIWARI RAJESH KUMAR
分类号 G01R31/3177;G01R31/40 主分类号 G01R31/3177
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