发明名称 Low-H plasma treatment with N2 anneal for electronic memory devices
摘要 A method for forming a single damascene and/or dual damascene, contact and interconnect structure, comprising: performing front end processing, depositing copper including a copper barrier, annealing the copper in at least 90% N2 with less than 10% H2, performing planarization, performing in-situ low-H NH3 plasma treatment and low Si—H SiN etch stop layer deposition, and performing remaining back end processing.
申请公布号 US8202810(B2) 申请公布日期 2012.06.19
申请号 US20080971331 申请日期 2008.01.09
申请人 NICKEL ALEXANDER H.;EVANS ALLEN L.;TRAN MINH QUOC;YOU LU;NGO MINH VAN;GAO PEI-YUAN;BRENNAN WILLIAM S.;WILSON ERIK;KIM SUNG JIN;PHAM HIEU TRUNG;SPANSION LLC 发明人 NICKEL ALEXANDER H.;EVANS ALLEN L.;TRAN MINH QUOC;YOU LU;NGO MINH VAN;GAO PEI-YUAN;BRENNAN WILLIAM S.;WILSON ERIK;KIM SUNG JIN;PHAM HIEU TRUNG
分类号 H01L21/31 主分类号 H01L21/31
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