PIPELINED ANALOG DIGITAL CONVERTOR

摘要

PURPOSE: A pipelined ADC(Analog To Digital Converter) is provided to minimize errors in a conversion stage by arranging a pipeline conversion stage error measurement and correction circuit. CONSTITUTION: A conversion stage circuit(1100) includes an upper conversion part(1100a) and a lower conversion part(1100b). A first digital correction circuit(1200) performs a logic correction motion by receiving digital codes outputted from the lower conversion part. The first digital correction circuit outputs M bits of corrected digital codes. A pipeline conversion stage error measurement and correction circuit(1300) corrects extracted errors by measuring conversion stage gains and offset errors in a first conversion stage. A second digital correction circuit(1400) finally outputs N bits of the digital codes by receiving the M bits of the digital codes. A clock signal generator(1500) generates clock signals necessary for digital conversion. A reference voltage buffer(1600) generates a reference voltage necessary for the digital conversion.