| 摘要 |
<p>The present invention provides a decimal absolute value adder, in which two operands are added to obtain a first calculation result, two operands and 10 are added to obtain a second calculation result, two operands and 6 are added to obtain a third calculation result, two operands and 1 are added to obtain a fourth calculation result, two operands and 11 are added to obtain a fifth calculation result, and two operands and 7 are added to obtain a sixth calculation result. When the calculation is the addition of a pair of numbers having the same sign, or is the addition of a pair of numbers having different signs where the result is not negative, any one of the calculation results of the first, second, fourth, and fifth calculation results is selected. When the calculation is the addition of a pair of numbers having different signs where the result is negative, the complement of any one of the first, third, fourth, and sixth calculation results is selected, and the decimal absolute value addition result is output.</p> |
