发明名称 IEEE1588-BASED SAMPLED VALUE MULTI-INTERFACE SYNCHRONIZATION SYSTEM FOR MULTIPLE SLAVE CLOCKS
摘要 <p>Disclosed is an IEEE1588-based sampled value multi-interface synchronization system, comprising a universal IEEE1588 clock interface, having a communication receiving module with multiple IEEE1588 slave clock interfaces, wherein the number of slave clocks may be automatically increased according to the number of master clocks. The universal multiple sampled value synchronization interface comprises a communication interface capable of being networking connected to a combination unit, and comprises an Ethernet data receiving module, a software sampling interpolation module, a phase-lock loop (PLL) module, a frequency tracking module and a multi-interface sampled value synchronization module. The present invention is applicable to a digital relay protection device, a power meter, a power quality monitoring device and other electronic apparatuses that require sampling synchronization, so as to provide a convenient solution to the problem of the dependence of current sampled value networking transmission on a global sampling synchronization source.</p>
申请公布号 WO2012075881(A1) 申请公布日期 2012.06.14
申请号 WO2011CN82358 申请日期 2011.11.17
申请人 JIANGSU ELECTRIC POWER COMPANY;JIANGSU FRONTIER ELECTRIC TECHNOLOGY CO., LTD;LI, CHENG;LU, YUJUN;CHEN, HAO;WANG, FULIANG 发明人 LI, CHENG;LU, YUJUN;CHEN, HAO;WANG, FULIANG
分类号 H04L7/00 主分类号 H04L7/00
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