发明名称 Buffering Systems For Accessing Multiple Layers Of Memory In Integrated Circuits
摘要 Embodiments of the invention relate generally to data storage and computer memory, and more particularly, to systems, integrated circuits and methods for accessing memory in multiple layers of memory implementing, for example, third dimension memory technology. In a specific embodiment, an integrated circuit is configured to implement write buffers to access multiple layers of memory. For example, the integrated circuit can include memory cells disposed in multiple layers of memory. In one embodiment, the memory cells can be third dimension memory cells. The integrated circuit can also include read buffers that can be sized differently than the write buffers. In at least one embodiment, write buffers can be sized as a function of a write cycle. Each layer of memory can include a plurality of two-terminal memory elements that retain stored data in the absence of power and store data as a plurality of conductivity profiles.
申请公布号 US2012147678(A1) 申请公布日期 2012.06.14
申请号 US201213401661 申请日期 2012.02.21
申请人 NORMAN ROBERT;UNITY SEMICONDUCTOR CORPORATION 发明人 NORMAN ROBERT
分类号 G11C7/10 主分类号 G11C7/10
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