发明名称 SELF-BYPASSING VOLTAGE LEVEL TRANSLATOR CIRCUIT
摘要 A voltage level translator circuit is selectively operable in one of at least two modes in response to a control signal. In a first mode, the voltage level translator circuit is operative to translate an input signal referenced to a first source providing a first voltage to an output signal referenced to a second source providing a second voltage. In a second mode, the voltage level translator circuit is operative to provide a signal path from an input of the voltage translator circuit to an output thereof without translating the input signal. The control signal is indicative of a difference between the first voltage and the second voltage.
申请公布号 KR101156341(B1) 申请公布日期 2012.06.13
申请号 KR20060017589 申请日期 2006.02.23
申请人 发明人
分类号 H03K19/0185 主分类号 H03K19/0185
代理机构 代理人
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