摘要 |
<p>A field effect transistor structure and method includes a well doped to have a first concentration of a dopant and a lightly or substantially undoped channel region. A highly doped screening region is positioned between the well and a gate. A threshold voltage set region can be formed at least in part by dopant implant after dummy gate removal. This allows for low power and good performance transistors capable of being manufactured by widely available planar CMOS processes.</p> |